Writing Testbenches: Functional Verification of HDL Models

Writing Testbenches: Functional Verification of HDL Models
Author :
Publisher : Springer
Total Pages : 478
Release :
ISBN-10 : 1461350123
ISBN-13 : 9781461350125
Rating : 4/5 (125 Downloads)

Book Synopsis Writing Testbenches: Functional Verification of HDL Models by : Janick Bergeron

Download or read book Writing Testbenches: Functional Verification of HDL Models written by Janick Bergeron and published by Springer. This book was released on 2012-10-21 with total page 478 pages. Available in PDF, EPUB and Kindle. Book excerpt: mental improvements during the same period. What is clearly needed in verification techniques and technology is the equivalent of a synthesis productivity breakthrough. In the second edition of Writing Testbenches, Bergeron raises the verification level of abstraction by introducing coverage-driven constrained-random transaction-level self-checking testbenches all made possible through the introduction of hardware verification languages (HVLs), such as e from Verisity and OpenVera from Synopsys. The state-of-art methodologies described in Writing Test benches will contribute greatly to the much-needed equivalent of a synthesis breakthrough in verification productivity. I not only highly recommend this book, but also I think it should be required reading by anyone involved in design and verification of today's ASIC, SoCs and systems. Harry Foster Chief Architect Verplex Systems, Inc. xviii Writing Testbenches: Functional Verification of HDL Models PREFACE If you survey hardware design groups, you will learn that between 60% and 80% of their effort is now dedicated to verification.


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