ASIC/SoC Functional Design Verification

ASIC/SoC Functional Design Verification
Author :
Publisher : Springer
Total Pages : 346
Release :
ISBN-10 : 9783319594187
ISBN-13 : 3319594184
Rating : 4/5 (184 Downloads)

Book Synopsis ASIC/SoC Functional Design Verification by : Ashok B. Mehta

Download or read book ASIC/SoC Functional Design Verification written by Ashok B. Mehta and published by Springer. This book was released on 2017-06-28 with total page 346 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book describes in detail all required technologies and methodologies needed to create a comprehensive, functional design verification strategy and environment to tackle the toughest job of guaranteeing first-pass working silicon. The author first outlines all of the verification sub-fields at a high level, with just enough depth to allow an engineer to grasp the field before delving into its detail. He then describes in detail industry standard technologies such as UVM (Universal Verification Methodology), SVA (SystemVerilog Assertions), SFC (SystemVerilog Functional Coverage), CDV (Coverage Driven Verification), Low Power Verification (Unified Power Format UPF), AMS (Analog Mixed Signal) verification, Virtual Platform TLM2.0/ESL (Electronic System Level) methodology, Static Formal Verification, Logic Equivalency Check (LEC), Hardware Acceleration, Hardware Emulation, Hardware/Software Co-verification, Power Performance Area (PPA) analysis on a virtual platform, Reuse Methodology from Algorithm/ESL to RTL, and other overall methodologies.


ASIC/SoC Functional Design Verification Related Books

ASIC/SoC Functional Design Verification
Language: en
Pages: 346
Authors: Ashok B. Mehta
Categories: Technology & Engineering
Type: BOOK - Published: 2017-06-28 - Publisher: Springer

DOWNLOAD EBOOK

This book describes in detail all required technologies and methodologies needed to create a comprehensive, functional design verification strategy and environm
SystemVerilog Assertions and Functional Coverage
Language: en
Pages: 424
Authors: Ashok B. Mehta
Categories: Technology & Engineering
Type: BOOK - Published: 2016-05-11 - Publisher: Springer

DOWNLOAD EBOOK

This book provides a hands-on, application-oriented guide to the language and methodology of both SystemVerilog Assertions and SystemVerilog Functional Coverage
Principles of Functional Verification
Language: en
Pages: 217
Authors: Andreas Meyer
Categories: Technology & Engineering
Type: BOOK - Published: 2003-12-05 - Publisher: Elsevier

DOWNLOAD EBOOK

As design complexity in chips and devices continues to rise, so, too, does the demand for functional verification. Principles of Functional Verification is a ha
Introduction to SystemVerilog
Language: en
Pages: 852
Authors: Ashok B. Mehta
Categories: Technology & Engineering
Type: BOOK - Published: 2021-07-06 - Publisher: Springer Nature

DOWNLOAD EBOOK

This book provides a hands-on, application-oriented guide to the entire IEEE standard 1800 SystemVerilog language. Readers will benefit from the step-by-step ap
SystemVerilog for Verification
Language: en
Pages: 500
Authors: Chris Spear
Categories: Technology & Engineering
Type: BOOK - Published: 2012-02-14 - Publisher: Springer Science & Business Media

DOWNLOAD EBOOK

Based on the highly successful second edition, this extended edition of SystemVerilog for Verification: A Guide to Learning the Testbench Language Features teac