Analysis of the Security of Split Manufacturing of Integrated Circuits

Analysis of the Security of Split Manufacturing of Integrated Circuits
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Book Synopsis Analysis of the Security of Split Manufacturing of Integrated Circuits by : Jonathon Crandall Magana

Download or read book Analysis of the Security of Split Manufacturing of Integrated Circuits written by Jonathon Crandall Magana and published by . This book was released on 2018 with total page 0 pages. Available in PDF, EPUB and Kindle. Book excerpt: Split manufacturing is a technique that allows manufacturing the transistor-level and lower metal layers of an IC at a high-end, untrusted foundry, while manufacturing only the higher metal layers at a smaller, trusted foundry. Using split manufacturing is only viable if the untrusted foundry cannot reverse engineer the higher metal layer connections (and thus the overall IC design) from the lower layers. This work begins with a study of the effectiveness of proximity attack as a key step to reverse engineer a design at the untrusted foundry. We propose and study different proximity attacks based on how a set of candidates are defined for each broken connection. The attacks use both placement and routing information along with factors which capture the router's behavior such as per-layer routing congestion. Our studies are based on designs having millions of nets routed across 9 metal layers and significant layer-by-layer wire size variation. Our results show that a common, Hamming Distance-based proximity attack seldom achieves a match rate over 5%. But our proposed attack yields a relatively-small list of candidates which often contains the correct match. We also propose a procedure to artificially insert routing blockages in a design at a desired split level, without causing any area overhead, in order to trick the router to make proximity-based reverse engineering significantly more challenging. This work goes on to analyze the security of split manufacturing using machine learning. We consider many types of layout features for machine learning including those obtained from placement, routing, and cell sizes. For the top split layer, we demonstrate dramatically better results in proximity attack compared to the same proximity attack without machine learning. We analyze the ranking of features used by machine learning and show the importance of how features vary when moving to the lower layers. Since the runtime of our basic machine learning becomes prohibitively large for lower layers, we propose novel techniques to make it scalable with little sacrifice in effectiveness of the attack. This work concludes by proposing a routing-based defense mechanism against the proximity attack. Our model is able to simultaneously generate multiple routing solutions which exhibit a trade off between the enhanced security versus degradation in wirelength. This means the generated solutions are Pareto-optimal with respect to each other such that for example, for a desired security, one solution is always best in terms of wirelength overhead, or for a desired allowable wirelength overhead, one solution always has the highest security. Our algorithm guarantees its process does not generate overflow of routing resources and gives flexibility to the designer to eventually select one of these generated solutions based on a desired level of security or tolerable wirelength overhead. This addresses an issue common in prior work, where a designer lacks control over a routing obfuscation technique's wirelength overhead. The effectiveness of our algorithm is demonstrated with experiments using the ISPD'11 benchmarks featuring up to two million nets.


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